Pin Assignment
Top View
SW
GND
FB
V IN
SHDN
5-Lead SOT-23
Figure 2. Pin Assignment
Pin Description
Pin No.
1
2
3
4
5
Pin Name
SW
GND
FB
SHDN
V IN
Pin Description
Switching node.
Analog and power ground.
Feedback node that connects to an external voltage divider.
Shutdown control pin. Logic HIGH enables, logic LOW disables the device.
Input voltage.
Absolute Maximum Ratings ( Note1)
Parameter
V IN to GND
FB, SHDN to GND
SW to GND
Lead Soldering Temperature (10 seconds)
Junction Temperature
Storage Temperature
Thermal Resistance ( Θ JA )
Min
-0.3
-0.3
-55
Max
6.0
V IN + 0.3
23
300
150
150
265
Unit
V
V
V
°C
°C
°C
°C/W
Electrostatic Discharge Protection (ESD) Level (Note 2)
HBM
CDM
2.5
1
kV
Recommended Operating Conditions
Input Voltage
Output Voltage
Operating Ambient Temperature
Output Capacitance (Note 3)
Parameter
Min
2.7
V IN
-40
1.6
Typ
25
Max
5.5
20
85
Unit
V
V
°C
μF
Notes:
1. Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This
is a stress rating only and functional operation of the device at these or any other conditions above those indicated
in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability. Absolute maximum ratings apply individually only, not in combination.
2. Using EIA/JESD22A114B (Human Body Model) and EIA/JESD22C101-A (Charge Device Model).
3. This load capacitance value is required for the loop stability. Tolerance, temperature variation, and voltage
dependency of the capacitance must be considered. Typically a 4.7μF ceramic capacitor is required to achieve
specified value at V OUT = 15V.
FAN5331 Rev. 1.0.1
2
www.fairchildsemi.com
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